MSD050

MSD050

DETECTOR DESIGN
Totally depleted ion implanted multi guard ring structures

Design

DETECTOR DESIGN
ACTIVE AREA DIAMETER50.00 mm
CHIP OUTER DIMENSIONS54.66 mm Flat to flat (16 Sides)
JUNCTION WINDOW TYPE OPTIONS2
JUNCTION METAL OPTIONS
OHMIC WINDOW2M
PACKAGE Housed in a metal case

Characteristics

Electrical Characteristics

THICKNESS20um30um80um300um
Typical Full Depletion (FD)*:<3V (2V Typical)<5V (2V Typical)<7V<60V
Typical Total Leakage current at FD*:<2 nA (1V Typical)<2 nA (1V Typical)<2 nA (1V Typical)<5 nA
Total Leakage current (at FD +10V)*:<2 nA <2 nA <2 nA <10 nA
Vb @ 10uA*:>50V>50V>50V>100V
Typical Vf@ 10mAV*:<0.80V<0.80V<0.80V<0.80V
Capacitance (FD)*: -40 pF/cm2
Total Junction Alpha Resolution**<100 KeV FWHM <100 KeV FWHM <40 KeV FWHM <35 KeV FWHM
Total Ohmic Alpha Resolution**<100 KeV FWHM <100 KeV FWHM <45 KeV FWHM <45 KeV FWHM
*All values measured at room temperature and ambient pressure.
**All values measured at a pressure of ~ 10-6 torr and typically biased to FD+30 V.
**Sample Electrical Results for other thicknesses available on request.

RADIATION
Survival to 1014 Neutrons, 1015 Protons
Proton damage 1nA /cm2/100 RAD increase in leakage current.
At 10MR leakage current increases but self-annealing reduces current at room temperature and above.
Detector will invert to P-Type at 3 x 10 14 protons/cm2 (1 megarad)

Heating/ Cooling will half or double leakage current every 10C for high resistivity silicon.

Options

Fight Qualifications (Optional)
Random Vibration: 3-axis, 20 Hz to 2 K Hz to LANL specification
Temperature Cycling: -60 °C to +50 °C, 1 cycle (unbiased)
Temperature Cycling: -40 °C to +40 °C, 10 cycles (biased)
(Biased 10 cycles and unbiased 1 cycle)
Vacuum Stability: 10-6 Torr at Operating Voltage, 72 hours 20 °C
Thermal Vac: 4 x 10-5 Torr, 21 Days +40 °C V operational, NASA GSFC standard
Acoustic Noise: LANL
Post-Characterisation and Alpha Resolution Measurement
Quality Assurance: BS EN 9001 :

Standards used in Manufacture of Space Qualified detectors:
NASA 87393 *
 Soldering Standard
ANSI/ ESD S20.20-1999 Electrostatic Discharge
ASTM E595-93 Outgassing/ Mass Loss
ISO9001:2000
 Quality
IPC6011
I PCB Build Standard
PC 6012B Class 3
 PCB Qualification
PC 6012B Class 3
 PCB Qualification
IPC 4101 Base Materials for PCB

SILICON
N-Type
The majority of devices are fabricated on n-type float zone material with a crystal orientation of <100>. This material has a high resistivity typically in the range 3 – 10 KΩ cm.
P-TypeP-type silicon processing can be offered on all designs where segmentation isolation is possible.
NTDNeutron transmutation doped n-type silicon is offered for applications where low resistivity variation across the wafer is required. This material has a much higher depletion voltage than regular high resistivity n-type material.

Silicon Wafer Size and Thickness
The wafer size corresponds to the standard* silicon thicknesses that the device can be processed on.

WAFER SIZE

STANDARD SILICON THICKNESSES

(µm)

4-inch

20, 30, 40, 50, 65, 80, 100, 140, 250, 300, 500, 1000, 1500 , 2000

6-inch

150, 200, 300, 400, 500, 675, 1000

Metallisation Type
The standard metallisation scheme is 100 % sputtered aluminium of thickness 0.3 µm for good ultra sonic wire bonding connections.
The evaporated metal system Ti/Ni/Au is also available on request. Gold ohmic contacts are used for high operating temperature detectors +55o to +120o required for military applications

METAL COVERAGE

DESCRIPTION

M

A continuous metal coverage of standard thickness over the whole active area region.

G

Grid coverage, typically 3 %, of standard thickness metallisation over the whole active area and contact pads for wire bonding.

P

A periphery metal band, typically 30 µm wide, around the edge of the active areas and contact pads for wire bonding. The majority of the active area has no dead layer contribution from the metal.

T

A standard periphery coverage, as described above, for good electrical contact, and a thin metal coverage typically 0.1 - 0.3 mm over the majority of the active area.

D

A double metal process used to track readout signal in a direction different to the active area elements.

E

An equipotential metal band array used on PSD devices.

Junction and Ohmic Window Type
The range of dead layer windows available with the in-house implanters are listed below. Window types refer to the junction of a device, but can also be achieved on the ohmic side upon request.

WINDOW TYPE

DEAD LAYER

(µm)

MINIMUM ENERGY THRESHOLD

Electron

(KeV)

Proton

(KeV)

2

0.5

4

90

7

0.3

2

70

9

0.1

1

20

9.5

0.05

0.5

10

10

0.01

0.1

1

PSD

0.03

0.3

5